An integrated circuit is typically formed on a substrate by the sequential deposition of conductive, semiconductive, or insulative layers on a silicon wafer. A variety of fabrication processes require planarization of a layer on the substrate. For example, for certain applications, e.g., polishing of a metal layer to form vias, plugs, and lines in the trenches of a patterned layer, an overlying layer is planarized until the top surface of a patterned layer is exposed. In other applications, e.g., planarization of a dielectric layer for photolithography, an overlying layer is polished until a desired thickness remains over the underlying layer.
Chemical mechanical polishing (CMP) is one accepted method of planarization. This planarization method typically requires that the substrate be mounted on a carrier or polishing head. The exposed surface of the substrate is typically placed against a rotating polishing pad. The carrier head provides a controllable load on the substrate to push it against the polishing pad. Abrasive polishing slurry is typically supplied to the surface of the polishing pad.
After the CMP process is performed for a certain period of time, the surface of the polishing pad becomes glazed due to accumulation of slurry by-products and/or material removed from the substrate and/or the polishing pad. Glazing reduces pad asperity, thus reducing the polishing rate. In addition, glazing may cause the polishing pad to lose some of its capacity to hold the slurry, further reducing the polishing rate.
Typically, the properties of the glazed polishing pad can be restored by a process of conditioning with a pad conditioner. The pad conditioner is used to remove the unwanted accumulations on the polishing pad and regenerate the surface of the polishing pad to a desirable asperity. Typical pad conditioners include a conditioning disk generally embedded with diamond abrasives which can be rubbed against the pad surface of the glazed polishing pad to retexture the pad.